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Hardware Platforms

A quantum hardware platform connects an information-processing task to a physical encoding, controlled operations, measurement records, and an operating environment. This chapter explains those connections for several families of devices. Its guiding question is which capabilities and failure modes matter for a specified workload, rather than which platform has the largest isolated performance number.

Helpful background. Bits, qubits, qudits, and modes distinguishes a physical carrier from an encoded system, the circuit model supplies operation semantics, and noise in quantum information introduces the difference between a target operation and its physical implementation.

Begin with the hardware overview, then metrics for quantum hardware and control, readout, and calibration. These pages establish common questions that should be carried into every platform comparison: what stores information, what couples the carriers, what is measured, which errors occur together, and which operations can run at the same time?

DiVincenzo (2000) organizes implementation requirements around characterized qubits, initialization, sufficiently preserved coherence, suitable gates, and measurement, with additional requirements for communication. This remains a useful conceptual checklist. A functioning architecture must also quantify how those capabilities compose during an actual task.

Choose one physical route before trying to compare all of them.

  • Controlled matter qubits. Superconducting qubits explains quantized circuit degrees of freedom and microwave control. Trapped-ion qubits connects internal states through controlled motion. Neutral-atom and Rydberg qubits combines trapped atoms, geometry control, and switchable interactions.
  • Solid-state spins. Silicon spin qubits follows confinement, exchange, spin control, and electrical readout. Defect and solid-state spin qubits connects localized spins, surrounding nuclei, and optical interfaces.
  • Photons and oscillators. Photonic qubits examines discrete encodings in optical modes, sources, measurements, and loss. Continuous-variable platforms treats directly processed quadratures and non-Gaussian resources. Bosonic qubits treats finite logical encodings inside oscillator Hilbert spaces. One physical mode need not correspond to one unprotected qubit.
  • Protected physical encodings. Topological qubits separates the encoding and intended protection mechanism from evidence for its ingredients and operations. A topological phase or a proposed nonlocal degree of freedom does not by itself demonstrate a complete, controllable logical processor.

A quoted coherence time is a parameter inferred from a specified experiment. It is not an operation count. For example, in an ideal exponential amplitude-damping model with no excitation, the probability that an initially excited, otherwise idle qubit has relaxed by time tt is

prelax(t)=1−e−t/T1.p_{\mathrm{relax}}(t)=1-e^{-t/T_1}.

For the illustrative values T1=100 μsT_1=100\,\mu\mathrm{s} and t=50 nst=50\,\mathrm{ns} this probability is approximately 5×10−45\times10^{-4}. This idle-decay probability does not bound an arbitrary gate error: a driven operation samples different populations, can produce leakage, and can suffer calibration and control errors absent from the idle model. The point is to connect a metric to its assumptions before using it in an architecture estimate.

Similarly, a gate fidelity needs an operation definition, measurement protocol, operating context, uncertainty, and treatment of leakage. Connectivity needs a native interaction and scheduling model. A nominal all-to-all interaction graph need not permit every edge to operate concurrently; a sparse graph can have strong parallelism. Readout duration and classical feedback latency may set the cycle time even when unitary gates are fast.

Use benchmarking, verification, and validation to connect reported scores to their estimands. Use resource estimation when physical operations must support an error-corrected workload. A threshold result is not a platform specification independent of its noise and architecture model.

Interfaces and infrastructure are part of the device

Section titled “Interfaces and infrastructure are part of the device”

Quantum memory hardware asks how states enter, wait in, and leave storage with useful quality and efficiency. Interconnects and transduction examines the physical path between modules and carriers, including loss, added noise, and mode matching. Their protocol-level counterparts are quantum memories and quantum transduction in the communication chapter: storage and conversion requirements depend on the service being delivered.

Cryogenic and vacuum infrastructure sets environmental conditions, access constraints, heat loads, and maintenance requirements. Materials and fabrication interface connects interfaces, defects, variation, and yield to the calibrated device. Modular architectures then asks whether local processing and inter-module services together meet the intended workload. A module boundary may simplify fabrication while adding latency, loss, synchronization, and extra memory requirements.

For the atomic, optical, and material mechanisms behind these devices, see AMO and Quantum Matter. Error correction and fault tolerance develops code constructions and their assumptions; Research tracks dated capability assessments and open questions.

Processor A has faster two-qubit gates; processor B has longer coherence. Which completes an adaptive circuit more reliably?

Answer

Those two numbers do not decide the question. The comparison requires the compiled circuit, native gates and connectivity, parallel schedule, gate and idle noise in the relevant context, readout and reset quality, feedback latency, leakage, and the success criterion. A longer coherence time may help while waiting for measurement results; faster gates may reduce the active duration. Neither benefit establishes the complete output error without a model or measurement of the whole execution.

  • DiVincenzo, David P. “The physical implementation of quantum computation.” Fortschritte der Physik 48, 771–783 (2000). arXiv:quant-ph/0002077 — implementation requirements for computation and communication.
  • Nielsen, Michael A., and Isaac L. Chuang. Quantum Computation and Quantum Information. 10th anniversary edition. Cambridge University Press, 2010 — physical implementations, quantum channels, and the distinction between ideal gates and noisy operations.