Quantum Computing Research
Quantum computing research becomes tractable when a proposed improvement is tied to a complete task: preserve a state, execute a protected gate, supply non-Clifford resources, or return a scientifically useful answer at specified cost and confidence. This chapter helps identify the subsystem that prevents that task from succeeding and a project small enough to test one proposed remedy.
Helpful background. Error correction and fault tolerance supplies the code and circuit language; logical benchmarking explains operational comparisons.
Choose the bottleneck before the platform
Section titled “Choose the bottleneck before the platform”For an experimentalist, the productive question may be why a larger code stops improving. For an algorithms student, it may be which precision requirement dominates the hardware bill. For a computer scientist, it may be whether a decoder remains reliable when its input distribution drifts. These are related projects with different evidence requirements.
| Research decision | Start here | First convincing deliverable |
|---|---|---|
| What does an experiment actually establish? | Logical milestones | Matched reference, acceptance rule, uncertainty interval |
| Which protection mechanism fits a device? | Error-correction frontiers, qLDPC, bosonic codes | Failure-mode crossover under the same noise model |
| Can the classical controller keep up? | Real-time decoders | Accuracy and latency-tail measurements on one syndrome stream |
| What prevents integration? | Architectures, hardware scaling | Explicit interface and resource budget |
| Is an application worth running? | Mitigation, advantage verification, resource estimates | Accuracy-matched comparison with a credible classical solver |
Evidence and unresolved integration
Section titled “Evidence and unresolved integration”Established in bounded experiments: increasing code protection can reduce logical-memory error in specified operating regimes. Google’s 2025 surface-code report is a useful example, with a distinct real-time-decoding experiment. That is evidence for memory protection, not a universal computer’s application-level success. Primary report.
Active: co-design of code, gates, decoder, calibration and resource factories. A favorable error rate for each isolated component need not survive simultaneous operation. Conjectural: any forecast that a particular architecture will deliver the lowest future cost without a measured, workload-specific integration model.
The fault-tolerant computing assessment and qLDPC assessment deliberately retain their 11 August 2026 historical cutoffs. Other pages identify the dates of selected sources. Literature links were checked on 11 October 2026; this chapter is a research map, not a comprehensive census through that date.
A first project that can become research
Section titled “A first project that can become research”Build a comparison notebook for two published logical-memory experiments. Extract physical reference, basis, duration, rounds, code size, discarded shots, decoder access and confidence interval. Reproduce one reported figure or explain exactly which unavailable data prevents reproduction. Start with the two surface-code reports listed below; a laptop and public supplementary tables suffice.
The baseline is the authors’ reported fit with the same accepted samples. A failure test is to change from error per cycle to error per second or include rejected trials: does the ranking reverse? The research extension is a new, experimentally measurable comparison protocol that handles a documented mismatch. Merely renaming published metrics is not an open research contribution.
Entry points
Section titled “Entry points”Read the stable benchmarking page first, reproduce one selected result second, and only then choose an architectural hypothesis. A good advisor can identify which calibration records or controller traces are available; access to those records can matter more than nominal device size.